DS Game Card
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Available at Nintendo [[NDS|DS]] & [[NDS|DS Lite]]. | Available at Nintendo [[NDS|DS]] & [[NDS|DS Lite]]. | ||
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− | ''Note: Direction is cartridge relative | + | ''Note: Direction is cartridge relative DS.'' |
Chipselect High-to-Low transitions are invoking commands, which are transmitted through data lines during next following eight CLK pulses, after the command transmission, further CLK pulses are used to transfer data, the data transfer ends at chipselect Low-to-High transition. | Chipselect High-to-Low transitions are invoking commands, which are transmitted through data lines during next following eight CLK pulses, after the command transmission, further CLK pulses are used to transfer data, the data transfer ends at chipselect Low-to-High transition. | ||
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Note: Supply Pins (1,8,17) are slightly longer than other pins. | Note: Supply Pins (1,8,17) are slightly longer than other pins. | ||
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== Contributions == | == Contributions == | ||
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[[Category:Connector]] | [[Category:Connector]] | ||
+ | [[Category:Cartridge]] |
Latest revision as of 22:36, 29 March 2007
Available at Nintendo DS & DS Lite.
Pinout
Pin | Dir | Name | ROM connection | EPROM connection | Notes |
---|---|---|---|---|---|
1 | ![]() |
GND | All unused pins | Pin 4 | |
2 | ![]() |
CLK | Pin 5 | Pin 6 | 4MB/s |
3 | ? | ? | Pin 17 | Seems to be not connected in console | |
4 | ![]() |
/CS1 | Pin 44 | ROM Chipselect | |
5 | ![]() |
/RES | Pin 42 | Reset, switches ROM to unencrypted mode | |
6 | ![]() |
/CS2 | Pin 1 | EPROM Chipselect | |
7 | ![]() |
IRQ | GND | ||
8 | ![]() |
3.3V | Pins 2, 23 | Pins 3, 7, 8 | |
9 | ![]() |
D0 | Pin 18 | ||
10 | ![]() |
D1 | Pin 19 | ||
11 | ![]() |
D2 | Pin 20 | ||
12 | ![]() |
D3 | Pin 21 | ||
13 | ![]() |
D4 | Pin 24 | ||
14 | ![]() |
D5 | Pin 25 | ||
15 | ![]() |
D6 | Pin 26 | Pin 2 | |
16 | ![]() |
D7 | Pin 27 | Pin 5 | |
17 | ![]() |
GND | All unused pins | Pin 4 |
Note: Direction is cartridge relative DS.
Chipselect High-to-Low transitions are invoking commands, which are transmitted through data lines during next following eight CLK pulses, after the command transmission, further CLK pulses are used to transfer data, the data transfer ends at chipselect Low-to-High transition. Data should be stable during CLK=LOW period throughout CLK rising edge.
Note: Supply Pins (1,8,17) are slightly longer than other pins.