Master System Cartridge

From HwB

(Difference between revisions)
 
Line 1: Line 1:
−
Available at Sega [[Master System]].
+
Available at Sega [[Master System]], [[Master System II]] and [[GameGear]] (with SMS adapter).
  
 
== Pinout ==
 
== Pinout ==
Line 8: Line 8:
  
 
{| {{border}}
 
{| {{border}}
−
! Pin!! Name
+
!! Pin !! Dir          !! Name   !! Description
 
|-
 
|-
−
| 1 || +5V
+
|| 1   || {{arrowr}}  || +5V    || Power +5V
 
|-
 
|-
−
| 2 || WR
+
|| 2   || ? {{arrowr}} || Wr*    || ? Write
 
|-
 
|-
−
| 3 || Mreq
+
|| 3   || ?            || M Req  || ? Memory Request
 
|-
 
|-
−
| 4 || ROM/RAM
+
|| 4   || ? {{arrowr}} || Rd*    || ? Read
 
|-
 
|-
−
| 5 || M8-B
+
|| 5   || ?            || M8-B   || Memory 8000-BFFF
 
|-
 
|-
−
| 6 || A14
+
|| 6   || {{arrowr}}  || A14     || Address bit14
 
|-
 
|-
−
| 7 || A13
+
|| 7   || {{arrowr}}  || A13     || Address bit13
 
|-
 
|-
−
| 8 || A8
+
|| 8   || {{arrowr}}  || A8     || Address bit8
 
|-
 
|-
−
| 9 || A9
+
|| 9   || {{arrowr}}  || A9     || Address bit9
 
|-
 
|-
−
| 10 || A11
+
|| 10   || {{arrowr}}  || A11     || Address bit11
 
|-
 
|-
−
| 11 || M0-7
+
|| 11   || ?            || M0-7   || Memory 0000-7FFF
 
|-
 
|-
−
| 12 || A10
+
|| 12   || {{arrowr}}  || A10     || Address bit10
 
|-
 
|-
−
| 13 || CrtOe
+
|| 13   || ?            || Crt OE  || ? Cartridge Output Enable
 
|-
 
|-
−
| 14 || D7
+
|| 14   || {{arrowlr}}  || D7     || Data bit7
 
|-
 
|-
−
| 15 || D6
+
|| 15   || {{arrowlr}}  || D6     || Data bit6
 
|-
 
|-
−
| 16 || D5
+
|| 16   || {{arrowlr}}  || D5     || Data bit5
 
|-
 
|-
−
| 17 || D4
+
|| 17   || {{arrowlr}}  || D4     || Data bit4
 
|-
 
|-
−
| 18 || D3
+
|| 18   || {{arrowlr}}  || D3     || Data bit3
 
|-
 
|-
−
| 19 || GND
+
|| 19   || {{arrow}}    || GND     || Ground
 
|-
 
|-
−
| 20 || GND
+
|| 20   || {{arrow}}    || GND     || Ground
 
|-
 
|-
−
| 21 || GND
+
|| 21   || {{arrow}}    || GND     || Ground
 
|-
 
|-
−
| 22 || D2
+
|| 22   || {{arrowlr}}  || D2     || Data bit2
 
|-
 
|-
−
| 23 || D1
+
|| 23   || {{arrowlr}}  || D1     || Data bit1
 
|-
 
|-
−
| 24 || D0
+
|| 24   || {{arrowlr}}  || D0     || Data bit0
 
|-
 
|-
−
| 25 || A0
+
|| 25   || {{arrowr}}  || A0     || Address bit0
 
|-
 
|-
−
| 26 || A1
+
|| 26   || {{arrowr}}  || A1     || Address bit1
 
|-
 
|-
−
| 27 || A2
+
|| 27   || {{arrowr}}  || A2     || Address bit2
 
|-
 
|-
−
| 28 || A3
+
|| 28   || {{arrowr}}  || A3     || Address bit3
 
|-
 
|-
−
| 29 || A4
+
|| 29   || {{arrowr}}  || A4     || Address bit4
 
|-
 
|-
−
| 30 || A5
+
|| 30   || {{arrowr}}  || A5     || Address bit5
 
|-
 
|-
−
| 31 || A6
+
|| 31   || {{arrowr}}  || A6     || Address bit6
 
|-
 
|-
−
| 32 || A7
+
|| 32   || {{arrowr}}  || A7     || Address bit7
 
|-
 
|-
−
| 33 || A12
+
|| 33   || {{arrowr}}  || A12     || Address bit12
 
|-
 
|-
−
| 34 || ??
+
|| 34   || ?           || ?      || ?
 
|-
 
|-
−
| 35 || +5V
+
|| 35   || {{arrowr}}  || +5V    || Power +5V
 
|-
 
|-
−
| 36 || A15
+
|| 36   || {{arrowr}}  || A15     || Address bit15
 
|-
 
|-
−
| 37 || M1
+
|| 37   || ?            || M1     || ?
 
|-
 
|-
−
| 38 || IoReq
+
|| 38   || ?            || IO Req  || ? I/O Request
 
|-
 
|-
−
| 39 || Refresh
+
|| 39   || ?            || Refresh || Refresh
 
|-
 
|-
−
| 40 || Halt
+
|| 40   || ?            || Halt    || Halt
 
|-
 
|-
−
| 41 || Wait
+
|| 41   || ?            || Wait    || Wait
 
|-
 
|-
−
| 42 || Int
+
|| 42   || ?            || Int     || ?
 
|-
 
|-
−
| 43 || JyDs
+
|| 43   || ?            || JyDs   || ?
 
|-
 
|-
−
| 44 || BusReq
+
|| 44   || ?            || Bus Req || ? Bus request
 
|-
 
|-
−
| 45 || BusAck
+
|| 45   || ?            || Bus Ack || ? Bus request acknowledge
 
|-
 
|-
−
| 46 || Reset
+
|| 46   || ?            || Reset  || Reset
 
|-
 
|-
−
| 47 || Clk
+
|| 47   || ?            || Clk     || ? Clock
 
|-
 
|-
−
| 48 || JRead
+
|| 48   || ?            || J read  || ?
 
|-
 
|-
−
| 49 || MC-F
+
|| 49   || ?            || MC-F   || Memory C000-FFFF
 
|-
 
|-
−
| 50 || NMI
+
|| 50   || ?            || *NMI   || ? Non Maskable Interrupt ?
 
|}
 
|}
 +
 +
''Note: Direction is Console relative Cartridge''
 +
 +
== Compatibility ==
  
 
Note:
 
Note:
Line 115: Line 119:
 
* All other consoles use 50-pin cartridges with a different shape
 
* All other consoles use 50-pin cartridges with a different shape
 
* The difference in cartridge style is a form of regional lockout  
 
* The difference in cartridge style is a form of regional lockout  
 +
 +
Cartridges were originally used for game of higher capacity than 256Kb (32KB), smaller ones were stored on cards.
 +
 +
When the Master System II arrived (without a card input), some Card games have been converted to cartridges.
 +
 +
Cartridges bigger than 512Kb (64KB) cannot be used with the 16 address bits and must use FCRs (Frame Control Registers, a bank switching method).
 +
 +
Because cards only have 15 address bits (while cartridges have all the 16 bits) and don't use bank switching, they are limited to 256Kb (32KB), cartridges are used for higher capacities.
  
 
== Sources ==
 
== Sources ==
 
* [http://www.gamesx.com/cartouts/mastercart.htm GameSX: Sega Master System Cart Pinout]
 
* [http://www.gamesx.com/cartouts/mastercart.htm GameSX: Sega Master System Cart Pinout]
 +
* [http://www.phm.lu/Documentation/Connectors/SegaMS-Cartridge.asp SMS/SGG Cartridges]
  
 
[[Category:Connector]]
 
[[Category:Connector]]

Revision as of 22:12, 28 December 2006

Available at Sega Master System, Master System II and GameGear (with SMS adapter).

Pinout 

Front 2           50
      ==============	
Back  1           49
! Pin Dir Name Description
1 Arrowr.png +5V Power +5V
2  ? Arrowr.png Wr*  ? Write
3  ? M Req  ? Memory Request
4  ? Arrowr.png Rd*  ? Read
5  ? M8-B Memory 8000-BFFF
6 Arrowr.png A14 Address bit14
7 Arrowr.png A13 Address bit13
8 Arrowr.png A8 Address bit8
9 Arrowr.png A9 Address bit9
10 Arrowr.png A11 Address bit11
11  ? M0-7 Memory 0000-7FFF
12 Arrowr.png A10 Address bit10
13  ? Crt OE  ? Cartridge Output Enable
14 Arrowlr.png D7 Data bit7
15 Arrowlr.png D6 Data bit6
16 Arrowlr.png D5 Data bit5
17 Arrowlr.png D4 Data bit4
18 Arrowlr.png D3 Data bit3
19 Arrow.png GND Ground
20 Arrow.png GND Ground
21 Arrow.png GND Ground
22 Arrowlr.png D2 Data bit2
23 Arrowlr.png D1 Data bit1
24 Arrowlr.png D0 Data bit0
25 Arrowr.png A0 Address bit0
26 Arrowr.png A1 Address bit1
27 Arrowr.png A2 Address bit2
28 Arrowr.png A3 Address bit3
29 Arrowr.png A4 Address bit4
30 Arrowr.png A5 Address bit5
31 Arrowr.png A6 Address bit6
32 Arrowr.png A7 Address bit7
33 Arrowr.png A12 Address bit12
34  ?  ?  ?
35 Arrowr.png +5V Power +5V
36 Arrowr.png A15 Address bit15
37  ? M1  ?
38  ? IO Req  ? I/O Request
39  ? Refresh Refresh
40  ? Halt Halt
41  ? Wait Wait
42  ? Int  ?
43  ? JyDs  ?
44  ? Bus Req  ? Bus request
45  ? Bus Ack  ? Bus request acknowledge
46  ? Reset Reset
47  ? Clk  ? Clock
48  ? J read  ?
49  ? MC-F Memory C000-FFFF
50  ? *NMI  ? Non Maskable Interrupt ?

Note: Direction is Console relative Cartridge

Compatibility

Note:

  • Japanese and South Korean consoles use 44-pin cartridges, same shape as Mark I and Mark II
  • All other consoles use 50-pin cartridges with a different shape
  • The difference in cartridge style is a form of regional lockout

Cartridges were originally used for game of higher capacity than 256Kb (32KB), smaller ones were stored on cards.

When the Master System II arrived (without a card input), some Card games have been converted to cartridges.

Cartridges bigger than 512Kb (64KB) cannot be used with the 16 address bits and must use FCRs (Frame Control Registers, a bank switching method).

Because cards only have 15 address bits (while cartridges have all the 16 bits) and don't use bank switching, they are limited to 256Kb (32KB), cartridges are used for higher capacities.

Sources

Retrieved from "http://www.hardwarebook.info/index.php?title=Master_System_Cartridge&oldid=7394"