VGA (VESA DDC)

From HwB

(Difference between revisions)
(DDC info added)
(Lots of info added)
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{| {{border}}
 
{| {{border}}
−
! Pin !! Name          !! Dir        !! Description
+
! Pin !! Name          !! Dir        !! Description     !! Impedance/Level
 
|-
 
|-
−
| 1  || RED            || {{arrowr}}  || Red Video (75 ohm, 0.7 V p-p)
+
| 1  || RED            || {{arrowr}}  || Red Video       || 75 Ω, 0.7 V p-p
 
|-
 
|-
−
| 2  || GREEN          || {{arrowr}}  || Green Video (75 ohm, 0.7 V p-p)
+
| 2  || GREEN          || {{arrowr}}  || Green Video     || 75 Ω, 0.7 V p-p
 
|-
 
|-
−
| 3  || BLUE          || {{arrowr}}  || Blue Video (75 ohm, 0.7 V p-p)
+
| 3  || BLUE          || {{arrowr}}  || Blue Video       || 75 Ω, 0.7 V p-p
 
|-
 
|-
 
| 4  || RES            || -          || Reserved
 
| 4  || RES            || -          || Reserved
Line 52: Line 52:
  
 
=== VESA DPMS power saving ===
 
=== VESA DPMS power saving ===
 +
 +
''DPMS = Device Power Management Signalling''
  
 
{| {{border}}
 
{| {{border}}
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=== DDC ===
 
=== DDC ===
  
−
DDC is I²C.
+
''DDC = Display Data Channel''
 +
 
 +
{| {{border}}
 +
! rowspan="2" | Name !! colspan="2" | Pins                  !! rowspan="2" | Protocol
 +
|-
 +
                      ! SDA              !! SCL
 +
|-
 +
| DDC1              || rowspan="5" | 12 || 14              || Unidirection protocol (uses VSYNC (14) as clock)
 +
|-
 +
| DDC2B                                  || rowspan="4" | 15 || I²C
 +
|-
 +
| DDC2B+                                                    || I²C (Bidirectional)
 +
|-
 +
| DDC2AB                                                    || I²C (ACCESS.bus)
 +
|-
 +
| DDC/CI                                                    || I²C
 +
|}
 +
 
 +
''Note: DDC2 was never implemented''
 +
 
 +
==== DDC1 ====
 +
DDC1 is a quite simple protocol. Unidirectional communication from the monitor to the video card. VSYNC (14) is used as clock.
 +
 
 +
==== DDC2B ====
 +
Based on Philips I²C protocol. Video card is the master and monitor is always slave. Monitor has address 0xA0 (for write mode) and 0xA1 (for read mode).
 +
Control of display is not possible only exchange of information.
 +
 
 +
==== DDC2B+ ====
 +
Modification to allow bidirectional communication, point to point. Both video card and monitor can be master and slave. Control of display is possible.
 +
 
 +
==== DDC2AB/DDC2B+ ====
 +
Monitors that implement DDC2AB/DDC2B+ are full featured ACCESS.bus devices. Multiple devices on one bus.
 +
ACCESS.bus is based on Philips I²C protocol. Default address for monitor is 0x6e and 0x50 for video card (host).
 +
Extra information is transmitted thru VDIF (VESA Video Display Information Format).
 +
 
 +
==== DDC/CI (formerly DDC2Bi) ====
 +
''DDC/CI = Display Data Channel Command Interface''
 +
E-DDC (VESA Enhanced Extended Display Data Channel Standard) is the physical standard.
 +
 
 +
=== Extended Display Identification Data ===
 +
''EDID = Extended Display Identification Data''
 +
 
 +
==== EDID 1.0/1.1 ====
 +
The EDID information consists of 128 bytes of monitor data.
 +
 
 +
Additional blocks of 128 bytes can be stored in EDID extension
 +
blocks (aka VDIF) after the initial EDID block. These blocks contain addtional detailed
 +
timing information. There is a flag within the EDID to indicate the existence of these
 +
blocks. VDIF is not currently used in our systems.
 +
 
 +
{| {{border}}
 +
! Version !! Revision !! Year !! Standard
 +
|-
 +
| 1      || 0        || 1994 || DDC
 +
|-
 +
| 1      || 1        || 1996 || EDID Standard v2
 +
|-
 +
| 1      || 2        || 1997 || EDID Standard v3
 +
|-
 +
| 2      || 0        || 1997 || EDID Standard v3 (Discouraged for future designs)
 +
|-
 +
| 1      || 3        || 1999 || E-EDID Rel A
 +
|}
 +
 
 +
{| {{border}}
 +
! Offset  !! colspan="2" | Name                                                      || Description
 +
|-
 +
| 00h-07h || colspan="2" | Header                                                    || 00h, FFh, FFh, FFh, FFh, FFh, FFh, 00h
 +
|-
 +
| 08h-09h || rowspan="2" | Vendor/Product ID            || Manufacturer ID          || provided by Microsoft
 +
|-
 +
| 0Ah-0Bh                                                || Product ID              || assigned by manufacturer
 +
|-
 +
| 0Ch-0Fh || colspan="2" | Serial number                                            ||
 +
|-
 +
| 10h    || rowspan="2" | Manufacturing date            || Week                    || 1-54
 +
|-
 +
| 11h                                                    || Year                    || Year-1990 (must be >3)
 +
|-
 +
| 12h    || rowspan="2" | EDID verion                  || Version                  || Current version 1
 +
|-
 +
| 13h                                                    || Revision                || Current revision 3
 +
|-
 +
| 14h    || rowspan="5" | Basic Display Parameters      || Video Input Definition  ||
 +
* bit 7: 0=analog, 1=digital
 +
* if bit 7 is digital:
 +
** bit 0: 1=DFP 1.x compatible
 +
* if bit 7 is analog:
 +
** bit 6-5: video level
 +
*** 00=0.7, 0.3, 01=0.714, 0.286, 10=1, .4 11=0.7, 0
 +
** bit 4: blank-to-black setup
 +
** bit 3: separate syncs
 +
** bit 2: composite sync
 +
** bit 1: sync on green
 +
** bit 0: serration vsync
 +
|-
 +
| 15h                                                    || Width                    || in cm, 0 for projectors
 +
|-
 +
| 16h                                                    || Height                  || in cm, 0 for projectors
 +
|-
 +
| 17h                                                    || Gamma                    ||
 +
|-
 +
| 18h                                                    || Power Management support ||
 +
* bit 7: standby
 +
* bit 6: suspend
 +
* bit 5: active-off/low power
 +
* bit 4-3: display type.
 +
** 00=monochrome, 01=RGB colour, 10=non RGB multicolour, 11=undefined
 +
* bit 2: standard colour space (sRGB)
 +
* bit 1: preferred timing mode
 +
* bit 0: default GTF supported
 +
|}
 +
 
 +
''Note: Little-endian''
 +
 
 +
==== E-EDID ====
 +
''E-EDID = Enhanced Extended Display Identification Data Standard''
 +
Up to 32kB of data.
 +
 
 +
== Links ==
 +
* [http://www.vesa.org/Public/Access%20Bus/abusv30.pdf ACCESS.bus Specifications v3.0]
  
 
== Contributions ==
 
== Contributions ==
Line 75: Line 197:
 
* Various sources
 
* Various sources
 
* [http://www.epanorama.net/documents/pc/vga_bd15.html ePanorama.net: VGA analogue display connector]
 
* [http://www.epanorama.net/documents/pc/vga_bd15.html ePanorama.net: VGA analogue display connector]
 +
* [http://www.keil.com/dd/docs/datashts/hynix/hms9xc713x_um.pdf Hynix HMS9xC7132/HMS9xC7134 datasheet]
 +
* [http://www.repairfaq.org/sam/vidconv.htm Notes on Video Conversion] by Samuel M. Goldwasser
 +
* [http://www.filibeto.org/sun/lib/hardware/graphics/ffbconfig_res_determination.html How ffbconfig and other graphic card configuration tools determine the monitor resolution capability]
 +
* [http://www.vesa.org/Public/PT03EDID.pdf VESA PlugTest April 2003: Enhanced DDC and EDID] by Jack Hosek (NEC-Mitsubishi Electronics Display)
  
 
[[Category:Connector]]
 
[[Category:Connector]]
 
[[Category:Video]]
 
[[Category:Video]]

Revision as of 15:59, 26 January 2007

VGA=Video Graphics Adapter or Video Graphics Array
VESA=Video Electronics Standards Association
DDC=Display Data Channel

Contents

Pinout

Videotype: Analogue.

Dsubhi15f.png

15 PIN HIGHDENSITY D-SUB FEMALE at the videocard.

Dsubhi15m.png

15 PIN HIGHDENSITY D-SUB MALE at the monitor cable.

Pin Name Dir Description Impedance/Level
1 RED Arrowr.png Red Video 75 Ω, 0.7 V p-p
2 GREEN Arrowr.png Green Video 75 Ω, 0.7 V p-p
3 BLUE Arrowr.png Blue Video 75 Ω, 0.7 V p-p
4 RES - Reserved
5 GND Arrow.png Ground
6 RGND Arrow.png Red Ground
7 GGND Arrow.png Green Ground
8 BGND Arrow.png Blue Ground
9 +5V Arrowr.png +5 VDC
10 SGND Arrow.png Sync Ground
11 ID0 Arrowl.png Monitor ID Bit 0 (optional)
12 SDA Arrowlr.png DDC Serial Data Line
13 HSYNC or CSYNC Arrowr.png Horizontal Sync (or Composite Sync)
14 VSYNC Arrowr.png Vertical Sync
15 SCL Arrowlr.png DDC Data Clock Line

Note: Direction is Computer relative Monitor.

VESA DPMS power saving

DPMS = Device Power Management Signalling

Signal Power save mode
Normal Standby Supspended Off
13 HSYNC On Off On Off
14 VSYNC On On Off Off
Power level 100% 80% <30W <8W

DDC

DDC = Display Data Channel

Name Pins Protocol
SDA SCL
DDC1 12 14 Unidirection protocol (uses VSYNC (14) as clock)
DDC2B 15 I²C
DDC2B+ I²C (Bidirectional)
DDC2AB I²C (ACCESS.bus)
DDC/CI I²C

Note: DDC2 was never implemented

DDC1

DDC1 is a quite simple protocol. Unidirectional communication from the monitor to the video card. VSYNC (14) is used as clock.

DDC2B

Based on Philips I²C protocol. Video card is the master and monitor is always slave. Monitor has address 0xA0 (for write mode) and 0xA1 (for read mode). Control of display is not possible only exchange of information.

DDC2B+

Modification to allow bidirectional communication, point to point. Both video card and monitor can be master and slave. Control of display is possible.

DDC2AB/DDC2B+

Monitors that implement DDC2AB/DDC2B+ are full featured ACCESS.bus devices. Multiple devices on one bus. ACCESS.bus is based on Philips I²C protocol. Default address for monitor is 0x6e and 0x50 for video card (host). Extra information is transmitted thru VDIF (VESA Video Display Information Format).

DDC/CI (formerly DDC2Bi)

DDC/CI = Display Data Channel Command Interface E-DDC (VESA Enhanced Extended Display Data Channel Standard) is the physical standard.

Extended Display Identification Data

EDID = Extended Display Identification Data

EDID 1.0/1.1

The EDID information consists of 128 bytes of monitor data.

Additional blocks of 128 bytes can be stored in EDID extension blocks (aka VDIF) after the initial EDID block. These blocks contain addtional detailed timing information. There is a flag within the EDID to indicate the existence of these blocks. VDIF is not currently used in our systems.

Version Revision Year Standard
1 0 1994 DDC
1 1 1996 EDID Standard v2
1 2 1997 EDID Standard v3
2 0 1997 EDID Standard v3 (Discouraged for future designs)
1 3 1999 E-EDID Rel A
Offset Name Description
00h-07h Header 00h, FFh, FFh, FFh, FFh, FFh, FFh, 00h
08h-09h Vendor/Product ID Manufacturer ID provided by Microsoft
0Ah-0Bh Product ID assigned by manufacturer
0Ch-0Fh Serial number
10h Manufacturing date Week 1-54
11h Year Year-1990 (must be >3)
12h EDID verion Version Current version 1
13h Revision Current revision 3
14h Basic Display Parameters Video Input Definition
  • bit 7: 0=analog, 1=digital
  • if bit 7 is digital:
    • bit 0: 1=DFP 1.x compatible
  • if bit 7 is analog:
    • bit 6-5: video level
      • 00=0.7, 0.3, 01=0.714, 0.286, 10=1, .4 11=0.7, 0
    • bit 4: blank-to-black setup
    • bit 3: separate syncs
    • bit 2: composite sync
    • bit 1: sync on green
    • bit 0: serration vsync
15h Width in cm, 0 for projectors
16h Height in cm, 0 for projectors
17h Gamma
18h Power Management support
  • bit 7: standby
  • bit 6: suspend
  • bit 5: active-off/low power
  • bit 4-3: display type.
    • 00=monochrome, 01=RGB colour, 10=non RGB multicolour, 11=undefined
  • bit 2: standard colour space (sRGB)
  • bit 1: preferred timing mode
  • bit 0: default GTF supported

Note: Little-endian

E-EDID

E-EDID = Enhanced Extended Display Identification Data Standard Up to 32kB of data.

Links

Contributions

Source

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