TI-99/4A Side Port

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Available on TI-99/4A computers. On the right side

Pinout

  2                             44
+----------------------------------+
| ================================ |
+----------------------------------+
  1                             43
Pin Name Dir Description
1 VCC Arrowr.png +5 Volts power supply
2 SBE Arrowr.png Low if addr in >9000-94xx (sound port)
3 RESET* Arrowr.png System reset (active low)
4 EXTINT* Arrowl.png External interrupt (active low)
5 A5 Arrowr.png Address bus, bit 5
6 A10 Arrowr.png -
7 A4 Arrowr.png -
8 A11 Arrowr.png -
9 DBIN Arrowr.png Active high = read memory
10 A3 Arrowr.png -
11 A12 Arrowr.png -
12 READY Arrowl.png Active high = memory is ready
13 LOAD* Arrowl.png Unmaskable interrupt (=> BLWP @>FFFC)
14 A8 Arrowr.png -
15 A13 Arrowr.png -
16 A14 Arrowr.png -
17 A7 Arrowr.png -
18 A9 Arrowr.png -
19 A15 Arrowr.png Address bus, lsb. Also CRU output bit.
20 A2 Arrowr.png -
21 GND Arrow.png Ground
22 CRUCLK* Arrowr.png Inversion of TMS9900 CRUCLOCK pin
23 GND Arrow.png Ground
24 PHI3* Arrowr.png Inversion of phase 3 clock
25 GND Arrow.png Ground
26 WE* Arrowr.png Write Enable (derived from TMS9900 WE* pin)
27 GND Arrow.png Ground
28 MBE* Arrowr.png Active low if addr in >4000-5FFF (card ROMs)
29 A6 Arrowr.png -
30 A1 Arrowr.png -
31 A0 Arrowr.png Address bus, bit 0 (most significant)
32 MEMEN* Arrowr.png Memory access enable (active low)
33 CRUIN Arrowl.png CRU input bit to TMS9900
34 D7 Arrowlr.png Data bus, bit 7 (least significant)
35 D4 Arrowlr.png -
36 D6 Arrowlr.png -
37 D0 Arrowlr.png Data bus, bit 0 (most significant)
38 D5 Arrowlr.png -
39 D2 Arrowlr.png -
40 D1 Arrowlr.png -
41 IAQ Arrowl.png Interrupt acknowledged by TMS9900
42 D3 Arrowlr.png -
43 VDD Arrowr.png -5 Volts power supply
44 AUDIOIN Arrowl.png To sound generator AUDIO IN pin

Note: Direction is computer relative device.

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